DocumentCode
565231
Title
On software design for stochastic processors
Author
Sloan, Joseph ; Sartori, John ; Kumar, Rakesh
fYear
2012
fDate
3-7 June 2012
Firstpage
918
Lastpage
923
Abstract
Much recent research [8, 6, 7] suggests significant power and energy benefits of relaxing correctness constraints in future processors. Such processors with relaxed constraints have often been referred to as stochastic processors [10, 15, 11]. In this paper we present three approaches for building applications for such processors. The first approach relies on relaxing the correctness of the application based upon an analysis of application characteristics. The second approach relies upon detecting and then correcting faults within the application as they arise. The third approach transforms applications into more error tolerant forms. In this paper, we show how these techniques that enhance or exploit the error tolerance of applications can yield significant power and energy benefits when computed on stochastic processors.
Keywords
fault tolerant computing; power aware computing; stochastic processes; energy benefit; error tolerance; fault correction; fault detection; power benefit; relaxing correctness constraint; software design; stochastic processor; Fault detection; Fault tolerance; Optimization; Program processors; Robustness; Vectors; ABFT; Application Error Tolerance; Stochastic Processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
978-1-4503-1199-1
Type
conf
Filename
6241613
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