• DocumentCode
    565861
  • Title

    1MHz sampling high-speed single-phase PLL control using FPGA based hardware controller

  • Author

    Yoshida, Morito ; Hanashima, Yuichi ; Yokoyama, Tomoki

  • Author_Institution
    Tokyo Denki University, Japan
  • Volume
    1
  • fYear
    2012
  • fDate
    2-5 June 2012
  • Firstpage
    620
  • Lastpage
    625
  • Abstract
    In the utility interactive system, the inverter output voltage has to synchronize to the a utility grid. In the case of a single phase system, it is difficult to detect the instantaneous phase angle of the utility voltage. A new high-speed single phase PLL control for the single phase utility interactive inverter system is proposed. Quasi d-q transformation and LPF function are applied to construct the PLL control with 1MHz multi sampling parallel processing method based on FPGA base hardware controller. Evaluations were carried out with simulations. Very fast detection response was achieved with stable transient operations.
  • Keywords
    Asia; Clocks; Field programmable gate arrays; Fluctuations; Hardware; Harmonic analysis; Phase locked loops;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics and Motion Control Conference (IPEMC), 2012 7th International
  • Conference_Location
    Harbin, China
  • Print_ISBN
    978-1-4577-2085-7
  • Type

    conf

  • DOI
    10.1109/IPEMC.2012.6258817
  • Filename
    6258817