DocumentCode :
568805
Title :
Reducing memory complexity using data minimization technique on FPGA
Author :
Al Junid, Syed Abdul Mutalib ; Tahir, Nooritawati Md ; Abd Majid, Zulkifli ; Othman, Zulkifli ; Shariff, Khairul Khaizi Mohd
Author_Institution :
Fac. of Electr. Eng., Univ. Teknol. MARA, Shah Alam, Malaysia
Volume :
1
fYear :
2012
fDate :
12-14 June 2012
Firstpage :
431
Lastpage :
434
Abstract :
The effect of DNA sequence data minimization technique in converting eight bit DNA data to new two bits DNA data representation is presented. Memory complexity for the data minimization technique is compared and analyzed with existing DNA sequences data managing technique for determine the best solution for reducing the memory consumption for DNA sequences alignment accelerator application. The technique is designed, synthesized and simulated using Altera Quartus II version 9.1 EDA software and targeted to Cyclone II EP2C35 FPGA. The code was written using Verilog HDL language. Furthermore, the simulation effect between these techniques was carried out, presented and analyzed in this paper.
Keywords :
DNA; biology computing; field programmable gate arrays; hardware description languages; minimisation; sequences; Altera Quartus II version 9.1 EDA software; Cyclone II EP2C35 FPGA; DNA sequence data minimization technique; DNA sequences alignment accelerator application; DNA sequences data managing technique; Verilog HDL language; eight bit DNA data; memory complexity reduction; two bits DNA data representation; DNA; Field programmable gate arrays; Software; DNA sequences alignment; FPGA; data minimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer & Information Science (ICCIS), 2012 International Conference on
Conference_Location :
Kuala Lumpeu
Print_ISBN :
978-1-4673-1937-9
Type :
conf
DOI :
10.1109/ICCISci.2012.6297284
Filename :
6297284
Link To Document :
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