Hardware-efficient path planning for a mobile robot and FPGA realization

Author

Sudharsan, V. ; Sridharan, K.

Author_Institution

Dept. of Elec Eng, IIT Madras, Chennai, India

fYear

2012

fDate

6-9 Aug. 2012

Firstpage

1

Lastpage

5

Abstract

We consider the problem of finding a feasible path for a mobile robot from one point to another that avoids collisions with objects (obstacles) in the environment. We assume that the robot is equipped only with a field programmable gate array device (for processing) and present an algorithm for this problem. We also present an area-efficient architecture. One element of the architecture is the Coordinate Rotation Digital Computer (CORDIC) to facilitate rotation of the robot. Some experiments are also presented.

Keywords

collision avoidance; digital arithmetic; field programmable gate arrays; mobile robots; CORDIC; FPGA realization; area-efficient architecture; collision avoidance; coordinate rotation digital computer; feasible path; field programmable gate array device; hardware-efficient path planning; mobile robot; Acoustics; Field programmable gate arrays; Mobile robots; Robot kinematics; Robot sensing systems; Architecture; Field Programmable Gate Array (FPGA) Implementation; Mobile robot; Navigation; Ultrasonic sensors;

fLanguage

English

Publisher

ieee

Conference_Titel

Industrial and Information Systems (ICIIS), 2012 7th IEEE International Conference on

Conference_Location

Chennai

Print_ISBN

978-1-4673-2603-2

Type

conf

DOI

10.1109/ICIInfS.2012.6304788

Filename

6304788