• DocumentCode
    572407
  • Title

    FlexBulk: Intelligently forming atomic blocks in blocked-execution multiprocessors to minimize squashes

  • Author

    Agarwal, Rishi ; Torrellas, Josep

  • Author_Institution
    Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
  • fYear
    2011
  • fDate
    4-8 June 2011
  • Firstpage
    33
  • Lastpage
    44
  • Abstract
    Blocked-execution multiprocessor architectures continuously run atomic blocks of instructions - also called Chunks. Such architectures can boost both performance and software productivity, and enable unique compiler optimization opportunities. Unfortunately, they are handicapped in that, if they use large chunks to minimize chunk-commit overhead and to enable more compiler optimization, inter-thread data conflicts may lead to frequent chunk squashes. In this paper, we present automatic techniques to form chunks in these architectures to minimize the cycles lost to squashes. We start by characterizing the operations that frequently cause squashes. We call them Squash Hazards. We then propose squash-removing algorithms tailored to these Squash Hazards. We also describe a software framework called FlexBulk that profiles the code and transforms it following these algorithms. We evaluate FlexBulk on 16-threaded PARSEC and SPLASH-2 codes running on a simulated machine. The results show that, with 17,000-instruction chunks, FlexBulk eliminates, on average, over 90% of the squash cycles in the applications. As a result, compared to a baseline execution with 2,000-instruction chunks as in previous work, the applications run on average 1.43x faster.
  • Keywords
    multiprocessing systems; optimising compilers; 16-threaded PARSEC; FlexBulk; SPLASH-2 codes; atomic block formation; blocked-execution multiprocessors; chunk squash; chunk-commit overhead minimization; compiler optimization; instruction atomic blocks; interthread data conflicts; squash cycle lost minimization; squash hazards; squash minimization; squash-removing algorithms; Computer architecture; Hardware; Hazards; Message systems; Optimization; Registers; Synchronization; Atomic Block Execution; Speculation; Thread Squash;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture (ISCA), 2011 38th Annual International Symposium on
  • Conference_Location
    San Jose, CA
  • ISSN
    1063-6897
  • Print_ISBN
    978-1-4503-0472-6
  • Type

    conf

  • Filename
    6307770