DocumentCode :
573302
Title :
Improving the Performance of On-Board Cache for Flash-Based Solid-State Drives
Author :
Huang, Miaoqing ; Men, Liang
Author_Institution :
Dept. of Comput. Sci. & Comput. Eng., Univ. of Arkansas, Fayetteville, AR, USA
fYear :
2012
fDate :
28-30 June 2012
Firstpage :
283
Lastpage :
287
Abstract :
Flash-based Solid-State Drives (SSDs) are data storage devices that use flash memory to store persistent data. Previously we presented a centralized on-board cache for SSDs to improve the response time and reduce the physical writes to the flash media. An automatic periodic update (APU) feature with fixed period is used to write dirty and stable cache lines to flash media when the SSD is idle. In this work we propose a distributed on-board cache architecture to match the intrinsic parallelism of SSDs. Since there are N individual flash packages in one SSD device, N dirty cache lines are selected by the APU feature, each of which is written to a separate flash package. Simulation results show that this distributed on-board cache can significantly reduce the response time of SSDs by up to 90% compared with the SSDs without such a cache, while reducing the number of physical writes to the flash memory.
Keywords :
cache storage; flash memories; performance evaluation; APU feature; SSD; automatic periodic update feature; data storage devices; distributed on-board cache architecture; flash media; flash package; flash-based solid-state drives; intrinsic parallelism; on-board cache performance; persistent data; physical writes; Ash; Benchmark testing; Computer architecture; Drives; Manuals; Media; Time factors; automatic periodic update; performance improvement; simulation; solid-state drives;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Networking, Architecture and Storage (NAS), 2012 IEEE 7th International Conference on
Conference_Location :
Xiamen, Fujian
Print_ISBN :
978-1-4673-1889-1
Type :
conf
DOI :
10.1109/NAS.2012.43
Filename :
6310905
Link To Document :
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