Processor power simulator for low power code generation using look up table

In this paper, we propose a software-level power simulator that measures power consumption for each instruction of RTL processor and builds on a LUT so as to attain low power code generation. Recently, as demands for mobile device with new concept, such as smart phone and tablet PC, have been increasing rapidly, development of low power embedded processor is mandatory. Since these devices usually consist of complex software system for multiple functions, accomplishment of low power technology by optimizing software algorithms has been magnified. In optimizing software algorithms, the most essential part is low power source coding maintaining the required speed. In this paper, we propose a highly adaptable power simulator for a certain given processor using register transfer level code. Our suggested power simulator could easily identify the power consumption of different source codes that have the same function so as to obtain reference data to optimize software algorithms for low power design. In our experiments, applying our power simulator to the number of source codes before and after optimization, we could obtain a low power source code with on the average of 29.9% reduction in power consumption.