A passivation layer built-up multilayer on crypto-processors against mechanical damages

Mechanical damage to the final passivation layer of the crypto-processor is one of attacks methods used for extracting the secret data. The damage can be in the form of cracks, scratches which can affect the circuit performance and the most cases lead to the destruction of the chip. Thus the final passivation layer needs specifics properties to counter these attacks. This paper propose a passivation layer built-up multilayer characterized by a deposit on the IC of a first layer from hard dielectric material and a deposit on that layer a second layer from a soft dielectric material. The third layer from hard dielectric material is deposited on the second layer. The soft layer between two hard layers absorbs the mechanical stresses from the outside and in particular avoids the propagation of cracks in the hard layers of dielectric material. The outer hard layer prevents the plastic deformation of the soft layer. The soft layer is provided by a polymer layer while the hard layer is provided by silicon dioxide (SiO₂) and silicon nitride (Si₃N₄).