Analysis and Design of a 2.9-mW 53.4–79.4-GHz Frequency-Tracking Injection-Locked Frequency Divider in 65-nm CMOS

Author

Yue Chao ; Luong, Howard C.

Author_Institution

Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China

Volume

48

Issue

10

fYear

2013

fDate

Oct. 2013

Firstpage

2403

Lastpage

2418

Abstract

A frequency-tracking technique is proposed to enhance the locking range of millimeter-wave (mmW) injection-locked frequency dividers (ILFDs). An improved model is introduced for direct-injection ILFDs, based on which both the phase and gain conditions are analyzed and discussed. Moreover, a method of admittance locus is applied to obtain the design intuition for optimization and to predict the locking range accurately. Finally, with the proposed model and design methodology, a frequency-tracking ILFD is designed and fabricated in a 65-nm CMOS process, which measures a locking range of 39.2% from 53.4 to 79.4 GHz while consuming 2.9 mW from an 0.8-V power supply, which corresponds to an FoM of 8.97 GHz/mW.

Keywords

CMOS integrated circuits; circuit optimisation; field effect MIMIC; frequency dividers; CMOS; admittance locus; frequency 53.4 GHz to 79.4 GHz; frequency-tracking injection-locked frequency divider; gain condition; locking range; millimeter-wave injection-locked frequency divider; optimization; phase condition; power 2.9 mW; size 65 nm; Admittance; Analytical models; Frequency conversion; Integrated circuit modeling; Power demand; Resistance; Transistors; Admittance; LO; SDR; frequency divider; frequency tracking; injection-locked; injection-locked frequency divider (ILFD); locking range; millimeter-wave (mmW);

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2013.2272371

Filename

6567975