A flow for parasitics extraction in 3D-systems

Author

Heinig, Andy ; Dittrich, Michael ; Reitz, Sven ; Stolle, Jorn

Author_Institution

Div. Design Autom., Fraunhofer Inst. for Integrated Circuits, Dresden, Germany

fYear

2012

fDate

24-26 Sept. 2012

Firstpage

37

Lastpage

40

Abstract

Due to high integration density in 3D-Systems parasitic effects, which are originally not taken into account during design-phase, has a growing influence on the behavior of the entire system. Therefore, the influences of these effects have to be minimized within the design process. In the following a hierarchical modeling based flow for parasitic extraction of capacitance in 3D-Systems is described. The flow contains layout data import, translation and export data to our own hierarchical XML-based description, and electromagnetic calculations for capacitance extraction.

Keywords

electronic engineering computing; three-dimensional integrated circuits; 3D systems parasitic effect; capacitance extraction; electromagnetic calculation; hierarchical XML based description; hierarchical modeling based flow; high integration density; parasitic extraction; parasitics extraction; Barium; Capacitance; Design automation; Finite element methods; Layout; Solid modeling; XML; 3D-Systems; Parasitics extraction; STEP; XML; capacitances;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference Dresden-Grenoble (ISCDG), 2012 International

Conference_Location

Grenoble

Print_ISBN

978-1-4673-1717-7

Type

conf

DOI

10.1109/ISCDG.2012.6359995

Filename

6359995