DocumentCode
581256
Title
A harmonic rejection mixer in wideband transmitter
Author
Jin, Yuehai ; Dai, Fa Foster
Author_Institution
Qualcomm Inc., San Diego, CA, USA
fYear
2012
fDate
25-28 Oct. 2012
Firstpage
6240
Lastpage
6243
Abstract
This paper proposes a novel harmonic rejection mixer (HRM) designed for wideband transmitter. The HRM was designed and simulated in 0.13um CMOS technology. The 3rd and 5th order harmonics are suppressed more than 30dB up to 1GHz operational frequency. The LO attenuation is more than 100dBc. Input P1dB is higher than 11dBm. Core circuit consumes negligible power consumption.
Keywords
CMOS integrated circuits; harmonics suppression; mixers (circuits); 3rd order harmonic suppression; 5th order harmonic suppression; CMOS technology; harmonic rejection mixer; size 0.13 mum; wideband transmitter; Logic gates; Mixers; Radio frequency; Resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society
Conference_Location
Montreal, QC
ISSN
1553-572X
Print_ISBN
978-1-4673-2419-9
Electronic_ISBN
1553-572X
Type
conf
DOI
10.1109/IECON.2012.6389029
Filename
6389029
Link To Document