Title :
A tool to support Bluespec SystemVerilog coding based on UML diagrams
Author :
Durand, Sérgio H M ; Bonato, Vanderlei
Author_Institution :
Inst. of Math. & Comput. Sci., Univ. of Sao Paulo, Sao Carlos, Brazil
Abstract :
The use of high level languages to support the development of embedded systems is a current trend. Such approach tends to reduce the development time and cost. The process of translating a high level representation to the final hardware and software architecture is desirable to be automatic encompassing as much as possible the requirements specified in high level model. This work proposes a new tool to support Bluespec SystemVerilog code generation based on models represented via Activity and State UML diagrams. The tool accepts as input the XMI format and the generation process is based on templates where the target language is represented.
Keywords :
Unified Modeling Language; diagrams; hardware description languages; high level languages; software tools; Bluespec SystemVerilog code generation; Bluespec SystemVerilog coding; UML diagrams; XMI format; automatic encompassing; embedded system; hardware architecture; high level languages; high level representation; software architecture; Unified modeling language;
Conference_Titel :
IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4673-2419-9
Electronic_ISBN :
1553-572X
DOI :
10.1109/IECON.2012.6389493
