Improvement on MISC computer memory architecture based on forth

Author

Lie-ping, Zhang ; Xiao-jing, Li

Author_Institution

Coll. of Inf. Sci. & Eng., Guilin Univ. of Technol., Guilin, China

fYear

2012

fDate

25-27 July 2012

Firstpage

4734

Lastpage

4738

Abstract

In order to save the inconvenience on byte access of ROM register, this paper gives an improved memory management for stack computers. This solution has designed an address management unit for the 16-bit macro computer based on forth operating system. It also makes a detailed description of the specific composition of the components and makes functional simulations on FPGA platform. The experiments show that the improved processor has succeeded in reading and writing data in bytes, 16-bit or 32bit. By increasing the types of CALL instruction, this memory management increases ROM space constraints.

Keywords

field programmable gate arrays; memory architecture; operating systems (computers); read-only storage; storage management; CALL instruction; FPGA platform; MISC computer memory architecture; ROM register; address management unit; forth operating system; macro computer; memory management; reading data; stack computers; writing data; Computers; Educational institutions; Electronic mail; Field programmable gate arrays; Memory management; Operating systems; Read only memory; CALL instruction; FPGA platform; Forth operating system; MISC Computers; ROM space constraints; data access;

fLanguage

English

Publisher

ieee

Conference_Titel

Control Conference (CCC), 2012 31st Chinese

Conference_Location

Hefei

ISSN

1934-1768

Print_ISBN

978-1-4673-2581-3

Type

conf

Filename

6390759