DocumentCode :
584876
Title :
Usage of scratchpad memory in embedded systems — State of art
Author :
Anuradha, B. ; Vivekanandan, C.
Author_Institution :
Dept. of Comput. Sci. & Eng., SNS Coll. of Eng., Coimbatore, India
fYear :
2012
fDate :
26-28 July 2012
Firstpage :
1
Lastpage :
5
Abstract :
A method to both reduce energy and improve performance in a processor-based embedded system is described in this paper. Efficient utilization of on-chip memory space is extremely important in modern embedded system applications based on microprocessor cores. In addition to a data cache that interfaces with slower off-chip memory, a fast on-chip SRAM, called Scratch-Pad memory, is often used in several applications. Comprising of a scratchpad memory instead of an instruction cache, the target system dynamically (at runtime) copies into the scratchpad code segments that are determined to be beneficial (in terms of energy efficiency and/or speed) to execute from the scratchpad. A hardware controller is designed and implemented for managing the scratchpad memory. Strategically placed custom instructions in the program inform the hardware controller when to copy instructions from the main memory to the scratchpad. A novel heuristic algorithm is implemented for determining locations within the program where to insert these custom instructions.
Keywords :
SRAM chips; cache storage; embedded systems; microprocessor chips; data cache; energy efficiency; heuristic algorithm; microprocessor cores; off-chip memory; on-chip SRAM; on-chip memory space; processor-based embedded system; scratchpad memory; Aerospace electronics; Layout; Process control; Random access memory; Embedded Systems; Scratchpad memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computing Communication & Networking Technologies (ICCCNT), 2012 Third International Conference on
Conference_Location :
Coimbatore
Type :
conf
DOI :
10.1109/ICCCNT.2012.6396100
Filename :
6396100
Link To Document :
بازگشت