Analysis of two-stage CMOS op-amp for single-event transients

Author

Langalia, Henil ; Lad, Sarthak ; Lolge, Mangesh ; Rathod, Surendra

Author_Institution

Dept. of Electron. Eng., Sardar Patel Inst. of Technol., Mumbai, India

fYear

2012

fDate

19-20 Oct. 2012

Firstpage

1

Lastpage

4

Abstract

In this paper, the effect of single event transients (SET) in a two-stage CMOS operational amplifier is studied. The analysis of op-amp parameters is done for 90 nm, 130 nm and 180 nm technologies. Due to deep submicron CMOS, the effects of SETs has become significant in these circuits. These SETs are gaining an increased amount of attention as technology scales which is observed in the results for transient analysis obtained.

Keywords

CMOS analogue integrated circuits; operational amplifiers; radiation hardening (electronics); SET effects; deep submicron CMOS; single-event transients; size 130 nm; size 180 nm; size 90 nm; transient analysis; two-stage CMOS op-amp parameter analysis; two-stage CMOS operational amplifier; Analog circuits; CMOS integrated circuits; Gain; Integrated circuit modeling; Operational amplifiers; Transient analysis; Transistors; CMOS Operational amplifier; Deep submicron CMOS; Single-Event Transient;

fLanguage

English

Publisher

ieee

Conference_Titel

Communication, Information & Computing Technology (ICCICT), 2012 International Conference on

Conference_Location

Mumbai

Print_ISBN

978-1-4577-2077-2

Type

conf

DOI

10.1109/ICCICT.2012.6398149

Filename

6398149