• DocumentCode
    585802
  • Title

    Invited talk: Noise and mismatch in sub 28nm silicon processes

  • Author

    Marshall, Andrew

  • Author_Institution
    Adv. CMOS Technol. Dev., Texas Instrum., Dallas, TX, USA
  • fYear
    2012
  • fDate
    12-14 Sept. 2012
  • Firstpage
    88
  • Lastpage
    93
  • Abstract
    Mismatch and noise cause significant yield loss in 28nm and smaller process nodes. This paper examines these effects in analog, digital, RF and memory circuits, along with methods to quantify, account for and counteract problems associated with them.
  • Keywords
    CMOS analogue integrated circuits; CMOS memory circuits; elemental semiconductors; silicon; CMOS process; RF circuits; Si; analog circuits; digital circuits; memory circuits; process nodes; silicon process; size 28 nm; yield loss; Integrated circuit modeling; Logic gates; Mirrors; Noise; Noise measurement; Random access memory; Semiconductor process modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2012 IEEE International
  • Conference_Location
    Niagara Falls, NY
  • ISSN
    2164-1676
  • Print_ISBN
    978-1-4673-1294-3
  • Type

    conf

  • DOI
    10.1109/SOCC.2012.6398383
  • Filename
    6398383
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=585802