Title :
Neural recording system with low-noise analog front-end and comparator-based cyclic ADC
Author :
Kim, Susie ; Na, Seung-In ; Kim, Tae-Hoon ; Lee, Hyunjoong ; Kim, Sunkwon ; Rhee, Cyuyeol ; Kim, Suhwan
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea
Abstract :
This paper describes a low-noise neural recording integrated circuit composed of a low-noise analog front-end (AFE) and a low-power analog-to-digital converter (ADC). The AFE amplifies biopotentials and the ADC converts input signal to digital output. The AFE exhibits 53.4dB of mid-band gain, 38.8Hz-10.6kHz of -3dB bandwidth. Total input referred noise (IRN) of AFE is 10.8μVrms and noise efficiency factor (NEF) is 8.1. The ADC achieves 10bit resolution and operates at 2.5MS/s. The chip is fabricated and successfully tested in a 0.18μm CMOS process.
Keywords :
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); AFE; CMOS process; IRN; NEF; analog-to-digital converter; bandwidth 38.8 Hz to 10.6 kHz; comparator-based cyclic ADC; gain -3 dB; gain 53.4 dB; input referred noise; low-noise analog front-end; low-noise neural recording System; noise efficiency factor; size 0.18 mum; word length 10 bit; Analog-digital conversion; Bandwidth; Charge transfer; Electronics packaging; Integrated circuits; Noise; Power demand;
Conference_Titel :
SOC Conference (SOCC), 2012 IEEE International
Conference_Location :
Niagara Falls, NY
Print_ISBN :
978-1-4673-1294-3
DOI :
10.1109/SOCC.2012.6398393
