Artificial neural network emulation on NOC based multi-core FPGA platform

With the emergence of Multi-Core platforms, brain emulation in the form of Artificial Neural Nets has been announced as one of the important key research area. However, due to large non-linear growth of inter-neuron connectivity, direct mapping of ANNs to silicon structures is very difficult due to communication bottleneck. As the system grows in size the conventional bottom up approach for building the system is no more feasible. New methodologies for generating the system from high level specification are mandatory to cope with design complexity. Recently, Multi-core systems using NOC architectures offer a promising solution to this issue and are also scalable. In addition, the growing logic size FPGAs makes them ideal platforms for experimenting on ANN emulation. In this paper we present how ANNs can be mapped to a NOC based multi-core FPGA platform using a scalable and expandable methodology for rapid prototyping of complex applications. The platform is quickly generated by the NOC System Generator tool by describing the system using an XML configuration file. Using this methodology, a small ANN is successfully mapped to the NoC based platform. Results of the design space exploration of multi layer perceptron on various NOC platforms are presented.