Title :
Optimal interconnect termination for on-chip high speed signaling
Author :
Hussein, E.E.O. ; Ismail, Yehea I.
Author_Institution :
Nano-Electron. Integrated Syst. Center (NISC), Nile Univ., Cairo, Egypt
fDate :
Nov. 30 2011-Dec. 2 2011
Abstract :
This paper presents the analysis for high speed signaling over on-chip interconnects. The paper deals with the interconnect as a finite length transmission line, and derives the necessary equations that describe the response of the link at high and low frequencies. A new design methodology, based on resistive termination is introduced to eliminate the dispersion effect. This is done by equalizing the propagation speed of the low frequency components with the high frequency components of the signal. A comparison is done between the effect of resistive and capacitive terminations on the response of the on-chip link.
Keywords :
electromagnetic wave propagation; equalisers; integrated circuit interconnections; transmission lines; capacitive termination; dispersion effect; finite length transmission line; on-chip high-speed signaling; on-chip interconnects; on-chip link response; optimal interconnect termination; propagation speed; resistive termination; Attenuation; Design methodology; Dispersion; Impedance; Power transmission lines; Resistance; System-on-a-chip; dispersion; high speed; on-chip interconnect; resistive termination; signaling; transmission line;
Conference_Titel :
Energy Aware Computing (ICEAC), 2011 International Conference on
Conference_Location :
Istanbul
Print_ISBN :
978-1-4673-0466-5
Electronic_ISBN :
978-1-4673-0464-1
DOI :
10.1109/ICEAC.2011.6403628