Title :
A background calibration method for DAC mismatch correction in multibit sigma-delta modulators
Author :
Ali, Shady ; Tanner, Steve ; Farine, Pierre Andre
Author_Institution :
Swiss Fed. Inst. of Technol. (EPFL), Lausanne, Switzerland
Abstract :
A topology for the calibration of DAC errors in multibit sigma delta modulators is presented. The proposed technique enables the calibration to proceed in the background. In this technique, two DACs are used in a time-interleaved fashion. One DAC is calibrated at a time while the other is connected to the modulator. The technique is demonstrated by a design in UMC 0.18 μm CMOS technology which shows a very competitive figure of merit of 78fJ/Conv-Step. The extensive simulation results are presented to validate the results.
Keywords :
CMOS integrated circuits; calibration; digital-analogue conversion; network topology; sigma-delta modulation; DAC error calibration; DAC mismatch correction; UMC CMOS technology; background calibration method; multibit sigma-delta modulator; size 0.18 mum; topology; Bandwidth; Calibration; Capacitors; Modulation; Noise; Sigma delta modulation; Switches; ADC; DAC; background; calibration; modulator; sigma-delta;
Conference_Titel :
SoC Design Conference (ISOCC), 2012 International
Conference_Location :
Jeju Island
Print_ISBN :
978-1-4673-2989-7
Electronic_ISBN :
978-1-4673-2988-0
DOI :
10.1109/ISOCC.2012.6406887
