• DocumentCode
    59411
  • Title

    FPGA-Based Distributed Computing Microarchitecture for Complex Physical Dynamics Investigation

  • Author

    Borgese, Gianluca ; Pace, Calogero ; Pantano, Pietro ; Bilotta, Eleonora

  • Author_Institution
    Dept. of Inf. Eng., Univ. of Pisa, Pisa, Italy
  • Volume
    24
  • Issue
    9
  • fYear
    2013
  • fDate
    Sept. 2013
  • Firstpage
    1390
  • Lastpage
    1399
  • Abstract
    In this paper, we present a distributed computing system, called DCMARK, aimed at solving partial differential equations at the basis of many investigation fields, such as solid state physics, nuclear physics, and plasma physics. This distributed architecture is based on the cellular neural network paradigm, which allows us to divide the differential equation system solving into many parallel integration operations to be executed by a custom multiprocessor system. We push the number of processors to the limit of one processor for each equation. In order to test the present idea, we choose to implement DCMARK on a single FPGA, designing the single processor in order to minimize its hardware requirements and to obtain a large number of easily interconnected processors. This approach is particularly suited to study the properties of 1-, 2- and 3-D locally interconnected dynamical systems. In order to test the computing platform, we implement a 200 cells, Korteweg-de Vries (KdV) equation solver and perform a comparison between simulations conducted on a high performance PC and on our system. Since our distributed architecture takes a constant computing time to solve the equation system, independently of the number of dynamical elements (cells) of the CNN array, it allows us to reduce the elaboration time more than other similar systems in the literature. To ensure a high level of reconfigurability, we design a compact system on programmable chip managed by a softcore processor, which controls the fast data/control communication between our system and a PC Host. An intuitively graphical user interface allows us to change the calculation parameters and plot the results.
  • Keywords
    Korteweg-de Vries equation; cellular neural nets; distributed processing; field programmable gate arrays; graphical user interfaces; integration; mathematics computing; multiprocessor interconnection networks; reconfigurable architectures; system-on-chip; 1D locally interconnected dynamical systems; 2D locally interconnected dynamical systems; 3D locally interconnected dynamical systems; CNN array; DCMARK; FPGA-based distributed computing microarchitecture; KdV equation solver; Korteweg-de Vries equation solver; calculation parameter change; cellular neural network; complex physical dynamics; custom multiprocessor system; elaboration time reduction; fast control communication; fast data communication; graphical user interface; hardware requirement minimization; high performance PC; interconnected processors; parallel integration operations; partial differential equations; reconfigurable architecture; softcore processor; system on programmable chip design; FPGA; Korteweg–de Vries (KdV); cellular neural network (CNN); parallel computing;
  • fLanguage
    English
  • Journal_Title
    Neural Networks and Learning Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    2162-237X
  • Type

    jour

  • DOI
    10.1109/TNNLS.2013.2252924
  • Filename
    6515661