Title :
Ambipolar independent double gate FET logic
Author :
O´Connor, I. ; Jabeur, Kotb ; Beux, S.L. ; Navarro, D.
Author_Institution :
Lyon Inst. of Nanotechnol., Ecole Centrale de Lyon, Ecully, France
Abstract :
In this work, we present a review of recent logic circuit design research using ambipolar independent double gate field effect transistors (Am-ICDGFETs). In a first approach, we examine compact logic and show that, with respect to conventional CMOS-like static logic structures and for comparable power consumption, time delay and integration density can be reduced by 25% and 45% respectively. We then turn to reconfigurability, and demonstrate a key use of ambipolarity in a 16-function dynamically reconfigurable logic cell based on a sum-of-products Boolean function implementation, which achieves remarkable gains in terms of power consumption (9x) and in terms of intrinsic time delay (5x) with respect to conventional 16nm LP CMOS-based look-up table circuits. Finally, we tackle the question of logic synthesis for design paradigms using such fine-grain reconfigurable cells, and show how binary decision diagrams can be adapted to this purpose to generate, in a flexible way, multiple input selective function sets. Using this technique, a generated circuit was also evaluated and shown to compare very favorably to its CMOS equivalent.
Keywords :
Boolean functions; CMOS logic circuits; field effect transistors; table lookup; Am-ICDGFET; CMOS-like static logic structures; LP CMOS-based look-up table circuits; ambipolar independent double gate FET logic; ambipolar independent double gate field effect transistors; binary decision diagrams; comparable power consumption; dynamically reconfigurable logic cell; fine-grain reconfigurable cells; integration density; intrinsic time delay; logic circuit design; logic synthesis; size 16 nm; sum-of-products Boolean function; Abstracts; CNTFETs; Logic gates; Ambipolarity; Binary Decision Diagrams; Carbon Nanotubes; Logic Synthesis; Reconfigurable Logic; Standard Cells;
Conference_Titel :
Nanoscale Architectures (NANOARCH), 2012 IEEE/ACM International Symposium on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4503-1671-2