Thermal stress characteristics and reliability impact on 3-D ICs containing through-silicon-vias

Author

Tengfei Jiang ; Suk-Kyu Ryu ; Qiu Zhao ; Im, Jay ; Ho-Young Son ; Kwang-Yoo Byun ; Rui Huang ; Ho, Paul S.

Author_Institution

Microelectron. Res. Center, Univ. of Texas, Austin, TX, USA

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

3

Abstract

Thermal stresses in TSV structures have been measured using micro-Raman spectroscopy and precision wafer curvature technique as a function of temperature and during thermal cycling. The results were verified by finite element analysis (FEA) to characterize the thermomechanical behavior of the TSV structures. An initial nonlinear curvature behavior was observed and was attributed to grain growth, which was followed by a linear and reversible behavior. The impact of thermal stresses on the keep-out zone (KOZ) for devices near the TSVs was investigated.

Keywords

Raman spectroscopy; finite element analysis; integrated circuit reliability; thermal stresses; three-dimensional integrated circuits; 3D IC; FEA; finite element analysis; initial nonlinear curvature behavior; keep-out zone; linear behavior; microRaman spectroscopy; precision wafer curvature technique; reliability impact; reversible behavior; thermal cycling; thermal stress characteristics; thermomechanical behavior; through-silicon-vias; Silicon; Stress; Stress measurement; Temperature measurement; Thermal loading; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6467715

Filename

6467715