A 900MHz high linearity low power down-conversion mixer

Author

Jun-Yu Chen ; Bo Wang ; Shan Liu ; Jin-Peng Shen ; Zheng-Kun Ruan ; Yan Du ; Xin-an Wang ; Xing Zhang

Author_Institution

Shenzhen Grad. Sch., Key Lab. of Integrated Microsyst., Peking Univ., Shenzhen, China

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

3

Abstract

A 900MHz high linearity low power and low noise mixer is designed in TSMC 0.18-μm CMOS process. By exploiting the merit of capacitor cross-coupling (CC) topology and derivative superposition (DS) method, the mixer achieves low noise, high linearity with no additional power consumption. The 1/f noise is reduced to an unapparent level by utilizing vertical BJTs at the switch stage. The simulation results show that the mixer achieves:-0.9 dBm input 1dB compression point; 9.7 dB noise figure; 15.5 dB voltage conversion gain. The mixer draws less than 1.3 mA from a single 1.8V supply.

Keywords

1/f noise; CMOS integrated circuits; bipolar transistors; mixers (circuits); power consumption; 1/f noise; CC topology; DS method; TSMC CMOS process; capacitor cross-coupling topology; derivative superposition method; frequency 900 MHz; gain 15.5 dB; high linearity low power down-conversion mixer; low noise mixer; noise figure 9.7 dB; power consumption; vertical BJT; voltage 1.8 V; voltage conversion gain; FETs; Gain; Linearity; Mixers; Noise; Switches; Topology; capacitor cross-coupling; high linearity; low noise; low power; mixer; modified DS method;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6467912

Filename

6467912