• DocumentCode
    598464
  • Title

    Advanced ion implantation applications for leading edge transistor design

  • Author

    Gossmann, H.L. ; Erokhin, Y.

  • Author_Institution
    Appl. Mater. - Varian Semicond. Equip., Gloucester, MA, USA
  • fYear
    2012
  • fDate
    Oct. 29 2012-Nov. 1 2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Ion implantation is crucial to successful integration of integrated circuit process flows and has been so for more than 30 years, typically used in steps such as Well and Source/Drain formation. However, beyond those "classical" applications, ion implantation offers a wealth of opportunity directly in transistor design optimization, enabling improvements in defect control, device performance, and device yield. Here we discuss illustrating examples such as low-temperature implantation in Logic and Memory devices, line-edge roughness reduction, and series resistance reduction by work-function control through use of non-traditional implant-species. In IC manufacturing the change from furnace diffusion-based doping process to ion implantation greatly accelerated the growth of the IC industry to the size as we know it today. Similar expectations can arguably be made for Photovoltaics. We will discuss cell efficiency improvements demonstrated and potentially reachable if solar cell junctions are formed by ion implantation rather than furnace diffusion as well as the realizable cost reductions through elimination of process steps.
  • Keywords
    integrated circuit yield; integrated memory circuits; ion implantation; logic devices; optimisation; transistors; work function; defect control; device performance; device yield; furnace diffusion-based doping process; integrated circuit manufacturing; integrated circuit process flows; ion implantation; leading edge transistor design; line-edge roughness reduction; logic devices; low-temperature implantation; memory devices; nontraditional implant-species; photovoltaics; series resistance reduction; source/drain formation; transistor design optimization; well formation; work-function control; Computer architecture; Cryogenics; Implants; Ion implantation; Junctions; Microprocessors; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
  • Conference_Location
    Xi´an
  • Print_ISBN
    978-1-4673-2474-8
  • Type

    conf

  • DOI
    10.1109/ICSICT.2012.6467958
  • Filename
    6467958