Title :
Consideration of MOS capacitance effect in TSV modeling based on cylindrical modal basis functions
Author :
Ki Jin Han ; Swaminathan, Madhavan
Author_Institution :
Sch. of Electr. & Comput. Eng., Ulsan Nat. Inst. of Sci. & Technol., Ulsan, South Korea
Abstract :
TSV modeling method based on cylindrical modal basis functions is modified to consider the effect of depletion region formed by a DC bias voltage. Extended capacitance matrix equation is obtained to include depletion capacitances, and the new formula is inserted to the original formulation. The proposed method is tested for two TSVs with varying depletion depths, and the computed insertion losses, capacitance, and conductance show reasonable trends.
Keywords :
integrated circuit modelling; matrix algebra; three-dimensional integrated circuits; DC bias voltage; MOS capacitance effect; TSV modeling method; cylindrical modal basis functions; depletion capacitances; depletion depths; depletion region; extended capacitance matrix equation; insertion loss; Capacitance; Conductors; Equations; Integrated circuit modeling; Mathematical model; Silicon; Through-silicon vias;
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2012 IEEE
Conference_Location :
Taipei
Print_ISBN :
978-1-4673-1444-2
Electronic_ISBN :
978-1-4673-1445-9
DOI :
10.1109/EDAPS.2012.6469430
