DocumentCode :
599466
Title :
Green arithmetic logic unit
Author :
Al Haddad, Mazen ; ElSayed, Zaghloul ; Bayoumi, Magdy
Author_Institution :
Center for Advanced Computer Studies, University of Louisiana at Lafayette, USA
fYear :
2012
fDate :
3-5 Dec. 2012
Firstpage :
1
Lastpage :
4
Abstract :
With the scaling of technology and the need for high performance and more functionality, power dissipation becomes a major bottleneck for microprocessor systems design. The power dissipation has become an obsessive concern in the design and implementation of VLSI circuits with the development of the technology. In this paper, conventional low-power design approaches are discussed, and a new design based on Chain structure is presented. It provides a green solution and an alternative way to solve the problems of power supply distribution, interconnection and interfacing in VLSI circuits and a comparison experiment was performed over two circuit layouts of 16bit ALU implementations and using standard CMOS that saves more than 30% of power consumption, and 0.423 mg of CO2 emission.
Keywords :
Air pollution; Electricity; Green products; Layout; Multiplexing; Transistors; Very large scale integration; ALU; CO2; Green Computing; Layout; VLSI;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Energy Aware Computing, 2012 International Conference on
Conference_Location :
Guzelyurt, Cyprus
Print_ISBN :
978-1-4673-5326-7
Electronic_ISBN :
978-1-4673-5327-4
Type :
conf
DOI :
10.1109/ICEAC.2012.6471013
Filename :
6471013
Link To Document :
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