High-accuracy programmable timing generator with wide-range tuning capability

In this paper, a high-accuracy programmable timing generator with wide-range tuning capability is proposed. With the aid of dual delay-locked loop (DLL), both of the coarse and fine tuning mechanisms are operated in precise closed-loop scheme to lessen the effects of the ambient variations. The timing generator can provide sub-gate resolution and instantaneous switching capability. The circuit is implemented and simulated in TSMC 0.18 μm 1P6M technology. The test chip area occupies 1.9 mm². The reference clock cycle can be divided into 128 bins by interpolation to obtain 14 ps resolution with the clock rate at 550 MHz. The INL and DNL are within -0.21~+0.78 and -0.27~+0.43 LSB, respectively.