DocumentCode :
601568
Title :
A method to reduce zero-sequence circulating current in three-phase multi-module VSIs with reduced switch count
Author :
Narimani, Mehdi ; Moschopoulos, Gerry
Author_Institution :
Department of Electrical and Computer Engineering, University of Western Ontario, London, Canada
fYear :
2013
fDate :
17-21 March 2013
Firstpage :
496
Lastpage :
501
Abstract :
A new zero-sequence circulating current (ZSCC) reduction method for multi-module VSIs (MVSIs) consisting of P three phase inverters that are connected in parallel is proposed in this paper. Four-switch inverter modules are used instead of conventional six-switch modules to reduce cost. In the paper, the effectiveness of the proposed ZSCC reduction method is studied using selective harmonic elimination PWM (SHE-PWM). The proposed ZSCC reduction method can remove about P times the number of harmonics using the same switching frequency as compared to more conventional methods, as explained later in this proposal. The concepts discussed in the paper are confirmed with results obtained from an MVSI experimental prototype.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Power Electronics Conference and Exposition (APEC), 2013 Twenty-Eighth Annual IEEE
Conference_Location :
Long Beach, CA, USA
ISSN :
1048-2334
Print_ISBN :
978-1-4673-4354-1
Electronic_ISBN :
1048-2334
Type :
conf
DOI :
10.1109/APEC.2013.6520255
Filename :
6520255
Link To Document :
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