• DocumentCode
    602599
  • Title

    A novel system architecture for web scale applications using lightweight CPUs and virtualized I/O

  • Author

    Sudan, K. ; Balakrishnan, S. ; Lie, S. ; Min Xu ; Mallick, D. ; Lauterbach, G. ; Balasubramonian, R.

  • fYear
    2013
  • fDate
    23-27 Feb. 2013
  • Firstpage
    167
  • Lastpage
    178
  • Abstract
    Large web-scale applications typically use a distributed platform, like clusters of commodity servers, to achieve scalable and low-cost processing. The Map-Reduce framework and its open-source implementation, Hadoop, is commonly used to program these applications. Since these applications scale well with an increased number of servers, the cluster size is an important parameter. Cluster size however is constrained by power consumption. In this paper we present a system that uses low-power CPUs to increase the cluster size in a fixed power budget. Using low-power CPUs leads to the situation where the majority of a server´s power is now consumed by the I/O sub-system. To overcome this, we develop a virtualized I/O sub-system where multiple servers share I/O resources. An ASIC based high-bandwidth interconnect fabric, and FPGA based I/O cards implement this virtualized I/O. The resulting system is the first production quality implementation of cluster-in-a-box that uses low-power CPUs. The unique design demonstrates a way to build systems using low-power CPUs, allowing a much larger number of servers in a cluster in the same power envelope. To overcome software inefficiency and increase the utilization of virtualized disk bandwidth, optimizations necessary for the operating system are also discussed. We built hardware based on these ideas and experiments on this system show a 3X average improvement in performance-per-Watt-hour compared to a commodity cluster with the same power budget.
  • Keywords
    Internet; application specific integrated circuits; field programmable gate arrays; microprocessor chips; performance evaluation; power aware computing; public domain software; ASIC based high-bandwidth interconnect fabric; FPGA based I/O cards; MapReduce framework; Web-scale applications; cluster-in-a-box; commodity servers; distributed platform; hadoop; low-cost processing; low-power CPU; open-source implementation; performance-per-watt-hour; power consumption; scalable processing; virtualized I/O sub-system; virtualized disk bandwidth; Bandwidth; Computer architecture; Fabrics; Hardware; Power demand; Servers; Virtualization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computer Architecture (HPCA2013), 2013 IEEE 19th International Symposium on
  • Conference_Location
    Shenzhen
  • ISSN
    1530-0897
  • Print_ISBN
    978-1-4673-5585-8
  • Type

    conf

  • DOI
    10.1109/HPCA.2013.6522316
  • Filename
    6522316