An arbitrary stressed NBTI compact model for analog/mixed-signal reliability simulations

Author

Jinbo Wan ; Kerkhoff, Hans G.

Author_Institution

Testable Design & Testing of Integrated Syst. Group, Univ. of Twente, Enschede, Netherlands

fYear

2013

fDate

4-6 March 2013

Firstpage

31

Lastpage

37

Abstract

A compact NBTI model is presented by directly solving the reaction-diffusion (RD) equations in a simple way. The new model can handle arbitrary stress conditions without solving time-consuming equations and is hence very suitable for analog/mixed-signal NBTI simulations in SPICE-like environments. The model has been implemented in Cadence ADE with Verilog-A and also takes the stochastic effect of aging into account. The simulation speed has increased at least thousands times. The performance of the model is validated by both RD theoretical solutions as well as silicon results.

Keywords

SPICE; hardware description languages; negative bias temperature instability; Cadence ADE; SPICE like environment; Verilog A; analog signal NBTI simulation; analog signal reliability simulation; arbitrary stress condition; mixed signal NBTI simulation; mixed signal reliability simulation; reaction diffusion equations; stressed NBTI compact model; time consuming equations; Aging; Degradation; Equations; Logic gates; Mathematical model; Silicon; Stress; NBTI; RD model; Reaction-Diffusion solution; Reliability; analog; mixed-signal; simulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Quality Electronic Design (ISQED), 2013 14th International Symposium on

Conference_Location

Santa Clara, CA

ISSN

1948-3287

Print_ISBN

978-1-4673-4951-2

Type

conf

DOI

10.1109/ISQED.2013.6523587

Filename

6523587