Gate Leakage for 28 nm Stacked HfZrOx Dielectric of p-Channel MOSFETs After Decoupled Plasma Nitridation Treatment With Annealing Temperatures

Choosing a plasma nitridation treatment with some annealing technique incorporated into the gate engineering is helpful to fix the existence of oxygen vacancy and promote the crystallization temperature in high-k dielectric. Here is the higher annealing atmosphere as a whole providing the better drive current in p-channel metal-oxide-semiconductor field-effect transistors, compared with the lower one. The interface traps for the former, however, is slightly greater than the latter, causing a higher gate leakage in the middle electrical field operated at inversion mode. This phenomenon is more obvious in the tested short-channel device. A sandwich type of HfO_x/ZrO_y/HfO_x as gate dielectric at 28 nm node process is a fine selection to withstand or decrease the possibility of the formation of micro- or nanocrystallization increasing the gate leakage.