A novel flow for reducing clock skew considering NBTI effect and process variations

Negative bias temperature instability (NBTI) has emerged as a major concern not only to the functional circuits, but also to the clock tree. Further aggravated by process variations, aging-induced reliability issue becomes more challenging when technology further scales. Development of effective solutions for reducing clock skew and compensating aging effect under process variations remains as a challenge. Taking the impact from NBTI and process variations into account, we propose a novel flow for reducing clock skew by selectively replacing standard-V_th clock buffers with their high-V_th counterparts. An extended “divide and conquer” algorithm is developed to identify the critical clock buffers for replacement. The area overhead of our proposed flow is negligible, and the power consumption is reduced as well. Simulation results show that the proposed flow can effectively reduce the clock skew by at least 20% by replacing only 1.08% clock buffers on average for 10 years of degradation, even under an extremely constrained condition. The efficiency of our flow will be higher when the clock tree structure has a higher depth, rendering it more favorable for large-scale industry designs.