DocumentCode
603375
Title
Don´t Care Filling for Better Diagnostic Test Set
Author
Bhar, A. ; Chattopadhyay, Subrata ; Sengupta, Indranil ; Kapur, R.
Author_Institution
Dept. of Electron. & Electr. Commun., Indian Inst. of Technol., Kharagpur, Kharagpur, India
fYear
2013
fDate
6-8 April 2013
Firstpage
701
Lastpage
705
Abstract
Before delivering, the manufactured ICs are tested for defects. Diagnosis is the procedure to determine the sites where defects are likely to be present in a chip that failed a test set. For any diagnosis algorithm the accuracy of diagnosis depends on the test pattern set employed. More the test pattern set distinguishes fault pairs, more is the diagnosis quality. This paper addresses issue of assigning values to don´t care bits (X bits) in the test pattern set so that the circuit can be reasonably diagnosed by analyzing the output response. For this, a Particle Swarm Optimization (PSO) based approach has been proposed to fill the don´t-care bits. The proposed algorithm when run on full-scan ISCAS´89 benchmark circuits shows significant improvement over 0-fill and 1-fill based don´t care filling and reasonably good improvement over random-fill based techniques.
Keywords
automatic test pattern generation; circuit optimisation; fault diagnosis; integrated circuit testing; particle swarm optimisation; 0-fill based don´t care filling; 1-fill based don´t care filling; PSO; X bits; chip diagnosis; defect test; diagnosis algorithm; diagnosis quality; diagnostic test pattern set; don´t care bits; fault pairs; manufactured IC; particle swarm optimization; random-fill based technique; Birds; Circuit faults; Filling; Integrated circuit modeling; Semiconductor device modeling; TV; Vectors; PSO; VLSI circuits; don´t care fill; fault diagnosis; stuck-at fault;
fLanguage
English
Publisher
ieee
Conference_Titel
Communication Systems and Network Technologies (CSNT), 2013 International Conference on
Conference_Location
Gwalior
Print_ISBN
978-1-4673-5603-9
Type
conf
DOI
10.1109/CSNT.2013.150
Filename
6524493
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