Title :
Dramatically Low-Transistor-Count High-Speed Ternary Adders
Author :
Mirzaee, R.F. ; Moaiyeri, Mohammad Hossein ; Maleknejad, M. ; Navi, K. ; Hashemipour, Omid
Author_Institution :
Dept. of Comput. Eng., Islamic Azad Univ., Tehran, Iran
Abstract :
Ternary logic has inherently the potential of high computational speed in comparison with conventional binary logic. A new low-transistor-count, high-speed ternary half adder is presented in this paper. Carbon nanotube field effect transistors are utilized to realize the new design methodology. Unique characteristics of this technology provide multi-Vt circuitry with the flexibility which is highly essential for MVL designs. The given structure also benefits from high driving power and capability of operating in low voltages. It has only 26 transistors. A new high-performance ternary full adder is also presented. Finally, the proposed adder cells are put together in order to construct a 4-bit ternary ripple adder.
Keywords :
adders; carbon nanotube field effect transistors; logic design; ternary logic; 4-bit ternary ripple adder; MVL designs; adder cells; carbon nanotube field effect transistors; computational speed; conventional binary logic; design methodology; driving power; high-performance ternary full-adder; low-transistor-count high-speed ternary half-adders; multitansition voltage circuitry; ternary logic; Adders; CNTFETs; Capacitors; Inverters; Logic gates; Switching circuits; 4-bit ternary ripple adder; CNTFET; high-speed; nanoelectronics; ternary full adder; ternary half adder;
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on
Conference_Location :
Toyama
Print_ISBN :
978-1-4673-6067-8
Electronic_ISBN :
0195-623X
DOI :
10.1109/ISMVL.2013.24