• DocumentCode
    603526
  • Title

    Exact Template Matching Using Boolean Satisfiability

  • Author

    Abdessaied, N. ; Soeken, Mathias ; Wille, Robert ; Drechsler, Rolf

  • Author_Institution
    Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
  • fYear
    2013
  • fDate
    22-24 May 2013
  • Firstpage
    328
  • Lastpage
    333
  • Abstract
    Reversible logic is an emerging research area that has shown promising results in applications such as quantum computing, low power design, and optical computing. Since the synthesis of minimal circuits is a cumbersome task, many synthesis algorithms apply heuristics and can therefore not provide a minimal solution. As a consequence, post synthesis methods such as window optimization and template matching are being applied. Template matching algorithms explore the circuits for gate cascades that can be replaced by smaller ones using a special class of identity circuits, so called templates. The determination of cascades applicable for substitution is the bottleneck of the template matching algorithm and problem-solving methods have been proposed in the recent past. Since these algorithms are based on heuristics, it cannot be ensured that a matching cascade can always be found. In this paper, we propose a new approach that determines matching cascades based on Boolean satisfiability and therefore ensures that these cascades are always found if they exist. Experimental results demonstrate that template matching yields smaller circuits when applying the new method for cascade determination.
  • Keywords
    Boolean functions; cascade networks; computability; logic gates; multivalued logic; Boolean satisfiability; exact template matching; gate cascades; identity circuits; matching cascade determination; minimal circuit synthesis; post synthesis methods; reversible logic; template matching algorithm; Encoding; Heuristic algorithms; Logic gates; Optimization; Quantum computing; Search problems; optimization; reversible circuits; template matching;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on
  • Conference_Location
    Toyama
  • ISSN
    0195-623X
  • Print_ISBN
    978-1-4673-6067-8
  • Electronic_ISBN
    0195-623X
  • Type

    conf

  • DOI
    10.1109/ISMVL.2013.26
  • Filename
    6524685