DocumentCode
604725
Title
A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques
Author
Banerjee, Kunal ; Karfa, Chandan ; Sarkar, Debdeep ; Mandal, Chittaranjan
Author_Institution
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, Kharagpur, India
fYear
2012
fDate
19-22 Dec. 2012
Firstpage
67
Lastpage
71
Abstract
A novel value propagation based equivalence checking method of finite state machines with datapath (FSMDs) is presented here for validation of code motion transformations commonly applied during scheduling phase of high-level synthesis. Unlike many other reported techniques, our method is able to handle code motions across loop bodies. This is accomplished by repeated propagation of the mismatched values to subsequent paths until the values match or the final path segments are traversed without finding a match. Checking loop invariance of the values being propagated beyond the loops has been underlined to play an important role. The proposed method is capable of handling control structure modification as well. The method has been implemented and satisfactorily tested for some benchmark examples.
Keywords
finite state machines; program verification; scheduling; code motion technique verification; code motion transformation; datapath; final path segments; finite state machines; handling control structure modification; high-level synthesis; scheduling phase; value propagation based equivalence checking method; code motion validation; equivalence checking; finite state machines with datapath; value propagation;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic System Design (ISED), 2012 International Symposium on
Conference_Location
Kolkata
Print_ISBN
978-1-4673-4704-4
Type
conf
DOI
10.1109/ISED.2012.28
Filename
6526555
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