Preliminary all digital Channel Filter design for LTE-Advanced software radio implementation

This paper introduces a preliminary Tunable Digital Low pass Channel Filter designed and implemented according to the 3GPP Release 10 Receiver Characteristics. The filter is built using Altera´s DSP Builder Design Environment and Matlab Simulink to allow for FPGA implementation at a later stage. The functional simulation shows that the filter can satisfy Release 10 requirements in terms of magnitude response. This filter is scheduled for implementation on one of Altera´s FPGAs in order to assess its performance.