DocumentCode :
605531
Title :
Reconsideration of the threshold voltage variability estimated with pair transistor cell array
Author :
Terada, Kenji ; Higuchi, N. ; Tsuji, Keita
Author_Institution :
Fac. of Inf. Sci., Hiroshima City Univ., Hiroshima, Japan
fYear :
2013
fDate :
25-28 March 2013
Firstpage :
108
Lastpage :
111
Abstract :
The standard deviation of threshold voltage, σVTH, which is estimated with Pair Transistor cell Array (PTA), is examined using the test chip fabricated by 65-nm technology. It is found that the errors are caused by two problems: 1) the problem in the approximation and 2) leak current in the isolation region. Taking them into account, the application of PTA to the test structure in scribe line is studied.
Keywords :
MOSFET; PTA; isolation region; leak current; pair transistor cell array; size 65 nm; test chip; test structure; threshold voltage standard deviation; threshold voltage variability; Approximation methods; Current measurement; Logic gates; MOSFET; Threshold voltage; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures (ICMTS), 2013 IEEE International Conference on
Conference_Location :
Osaka, Japan
ISSN :
1071-9032
Print_ISBN :
978-1-4673-4845-4
Electronic_ISBN :
1071-9032
Type :
conf
DOI :
10.1109/ICMTS.2013.6528155
Filename :
6528155
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=605531
بازگشت