An ultra low power ultra low voltage LNA design using forward body biasing technique

In this paper we present the design and analysis of a fully integrated CMOS low noise amplifier (LNA) in .18 um CMOS technology with operating frequency of 2.4 GHz. Employing a Forward body biasing scheme with cascode configuration ultralow power consumption of 0.15 mW is obtained with an ultra low supply voltage of 0.5 V. The effect of the output matching network on stability has been shown by using high frequency analysis of the designed LNA. The amplifier provides a forward gain (S21) of 11dB with a noise figure of only 3dB. The designed circuit is highly stable with a stern stability factor of 2.2. The stability of the designed LNA is also being analyzed by stability circles. Using a figure of merit that contains the effect of amplifier noise figure, gain, linearity, DC power consumption and operating frequency, we have shown that this amplifier is superior to conventional CMOS LNA designs reported in the literature.