DocumentCode :
606217
Title :
Raised source drain metal diffusion in Finfet
Author :
Raveendra, Geethanjali ; Flavia Princess Nesama, I. ; Rijo, P.C ; Lakshmi Prabha, V.
Author_Institution :
II MTech VLSI Design, Karunya University, Coimbatore, India
fYear :
2013
fDate :
20-21 March 2013
Firstpage :
741
Lastpage :
745
Abstract :
The Double Gate FinFET has been designed for 90nm, 60nm and 30nm as an alternative solution to bulk devices using TCAD software. The FinFET with independent gate (IDG) structure is proposed to control Vth. When the Vth is controlled the leakage current can be reduced by improving its current driving capability. Here the source and drain areas are doped with semi conductor material along with metal. Then the occurrence of schottky barrier will arise which will reduce the device performance. In order to reduce the effect of schotkky barrier the doping concentration have to be changed within source and drain regions.The metal used for the front gate and back gate is TiN which has got a work fuction of 4.65eV. The work function is a very important consideration in the selection of metal for the gate structure and also it affects the Vth and the performance of a device. Since TiN has low sheet resistance and low parasitic capacitance the Vth can be controlled. By improving the performance of the FinFET device, the stability of memory cell can be improved.
Keywords :
Doping; FinFETs; Fluctuations; Lead; Logic gates; Random access memory; Tunneling; DG FinFET; DIBL; SS; Source Drain Diffusion;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits, Power and Computing Technologies (ICCPCT), 2013 International Conference on
Conference_Location :
Nagercoil
Print_ISBN :
978-1-4673-4921-5
Type :
conf
DOI :
10.1109/ICCPCT.2013.6528973
Filename :
6528973
Link To Document :
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