IC-Package Interaction

Author

Vandevelde, B. ; Ivankovic, A. ; Debecker, B. ; Lofrano, M. ; Vanstreels, K. ; Guo, Wenyong ; Cherman, V. ; Gonzalez, M. ; Van der Plas, G. ; De Wolf, Ingrid ; Beyne, Eric ; Tokei, Z.

Author_Institution

Imec, Leuven, Belgium

fYear

2013

fDate

14-17 April 2013

Firstpage

1

Lastpage

4

Abstract

Chip Package Interaction (CPI) gained a lot of importance in the last years. The reason is twofold. First, advanced node IC technologies requires dielectrics in the BEOL (back-end-of-line) with a decreasing k value. These so-called (ultra) low-k materials have a reduced stiffness and adhesion strength to the barrier materials, making the BEOL much more vulnerable to externally applied stress due to packaging. Secondly, advanced packaging technologies such as 3D stacked IC´s use thinned dies (down to 25μm) which can cause much higher stresses at transistor level, resulting in mobility shifts.

Keywords

carrier mobility; chip scale packaging; three-dimensional integrated circuits; 3D stacked IC; BEOL; barrier materials; chip package interaction; decreasing k value; externally applied stress; low-k materials; mobility shifts; Abstracts; Dielectrics; Electronic mail; Joints; Materials; Stress; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2013 14th International Conference on

Conference_Location

Wroclaw

Print_ISBN

978-1-4673-6138-5

Type

conf

DOI

10.1109/EuroSimE.2013.6529992

Filename

6529992