DocumentCode :
608243
Title :
Foundations for oxide breakdown compact modeling towards circuit-level simulations
Author :
Saliva, M. ; Cacho, F. ; Angot, D. ; Huard, Vincent ; Rafik, M. ; Bravaix, A. ; Anghel, Lorena
Author_Institution :
STMicroelectron., Crolles, France
fYear :
2013
fDate :
14-18 April 2013
Abstract :
Gate oxide breakdown is an important reliability issue. This mechanism is widely investigated at device level but the development of a compact model and the assessment at circuit level is much more complex to handle. We first characterize soft and hard breakdown. Then a transistor-level model is presented. The model is calibrated for a large range of breakdown severity. Finally the model is used at circuit level. The impact of breakdown on both static current and ring oscillator frequency is discussed.
Keywords :
circuit reliability; circuit simulation; electric breakdown; breakdown severity; circuit-level simulations; device level; gate oxide breakdown; hard breakdown; oxide breakdown compact modeling; reliability issue; ring oscillator frequency; soft breakdown; static current; transistor-level model; Electric breakdown; Integrated circuit modeling; Logic gates; MOS devices; Reliability; Semiconductor device modeling; Stress; circuit-level; compact model; dielectric breakdown; ring oscillator; transistor-level;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium (IRPS), 2013 IEEE International
Conference_Location :
Anaheim, CA
ISSN :
1541-7026
Print_ISBN :
978-1-4799-0112-8
Electronic_ISBN :
1541-7026
Type :
conf
DOI :
10.1109/IRPS.2013.6532062
Filename :
6532062
Link To Document :
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