Title :
Early failure model analysis and improvement of the upstream electromigration in 45nm Cu low-k interconnects
Author :
Wang, Dongping ; Zhao, A.Y. ; Yu, Long ; Wu, Junyong ; Chang, V. ; Chien, Wei-ting Kary
Author_Institution :
Semicond. Manuf. Int. Corp., Shanghai, China
Abstract :
The effect of early failure model on upstream EM reliability and its improvements are investigated in a 45nm CMOS process. The effective process optimizations of tapered via profile by organic under layer (ODL) over etch (OE) at chamfer area and enlarged trench CD have been analyzed and discussed. Recent observations shown tapered via profile at chamfer area can get much larger angle for barrier seed deposition and the trench CD enlargement can get larger deposition angle and larger process window for photo alignment process at the vertical section. With a better step coverage, the defect-free barrier seed layer will suppress via void formation and improve the upstream EM reliability.
Keywords :
CMOS integrated circuits; copper; electromigration; etching; failure analysis; integrated circuit interconnections; integrated circuit reliability; isolation technology; optimisation; vacuum deposition; CMOS process; Cu; ODLOE; PVD; barrier seed deposition; chamfer; defect-free barrier seed layer suppression; early failure model analysis; electromigration; low-k interconnection; organic under layer over etch; photo alignment process; size 45 nm; step coverage; trench CD enlargement; upstream EM reliability; void formation; Analytical models; Copper; Optimization; Physics; Reliability; Semiconductor device modeling; Tuning; early failure model; eletromigration; over etch; step coverage; trench CD;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2013 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4799-0112-8
Electronic_ISBN :
1541-7026
DOI :
10.1109/IRPS.2013.6532076
