DocumentCode :
60936
Title :
Improving ESD Robustness of pMOS Device With Embedded SCR in 28-nm High- k /Metal Gate CMOS Process
Author :
Chun-Yu Lin ; Pin-Hsin Chang ; Rong-Kun Chang
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Normal Univ., Taipei, Taiwan
Volume :
62
Issue :
4
fYear :
2015
fDate :
Apr-15
Firstpage :
1349
Lastpage :
1352
Abstract :
A pMOS device with an embedded silicon-controlled rectifier to improve its electrostatic discharge (ESD) robustness has been proposed and implemented in a 28-nm high- k /metal gate CMOS process. An additional p-type ESD implantation layer was added into the pMOS to realize the proposed device. The experimental results show that the proposed device has the advantages of high ESD robustness, low holding voltage, low parasitic capacitance, and good latchup immunity. With better performances, the proposed device was more suitable for ESD protection in a sub-50-nm CMOS process.
Keywords :
CMOS integrated circuits; MOSFET; electrostatic discharge; ion implantation; thyristors; ESD protection; ESD robustness; electrostatic discharge; embedded SCR; high-k CMOS process; latchup immunity; low holding voltage; low parasitic capacitance; metal gate CMOS process; p-type ESD implantation layer; pMOS device; silicon-controlled rectifier; size 28 nm; CMOS integrated circuits; CMOS technology; Educational institutions; Electrostatic discharges; MOS devices; Robustness; Thyristors; Electrostatic discharge (ESD); pMOS; silicon-controlled rectifier (SCR); silicon-controlled rectifier (SCR).;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2015.2396946
Filename :
7038138
Link To Document :
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