DocumentCode
609646
Title
A distributed thread scheduler for dynamic multithreading on throughput processors
Author
Ta-Kan Yen ; Hsien-Kai Kuo ; Lai, Bo-Cheng Charles
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2013
fDate
22-24 April 2013
Firstpage
1
Lastpage
4
Abstract
GPGPUs have emerged as one of the most widely used throughput processors. Deep multithreading and cache hierarchy are the two effective implementations to achieve high throughput computing in modern GPGPUs. However, these are two conflicting design options. Finding a proper design point between the two has become a significant performance factor to GPGPUs. This paper proposes a distributed thread scheduler for dynamic multithreading on GPGPUs. By demonstrating the trade-off issue between the multithreading and cache contention, the proposed scheduler dynamically adjusts the multithreading degree to achieve superior performance. With the proposed scheduler, the cache misses can be decreased by 20.6% and 37.9% on the L1 and L2 cache respectively. The overall performance can be enhanced by an average of 16.4%.
Keywords
graphics processing units; multi-threading; processor scheduling; GPGPU; cache contention; cache hierarchy; distributed thread scheduler; dynamic multithreading; general purpose graphic processing units; throughput processors; Graphics processing units; Instruction sets; Multithreading; Runtime; Throughput; Tuning;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, Automation, and Test (VLSI-DAT), 2013 International Symposium on
Conference_Location
Hsinchu
Print_ISBN
978-1-4673-4435-7
Type
conf
DOI
10.1109/VLDI-DAT.2013.6533822
Filename
6533822
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