DocumentCode
609688
Title
Worst-case IR-drop monitoring with 1GHz sampling rate
Author
Chen-Hsiang Hsu ; Shi-Yu Huang ; Ding-Ming Kwai ; Yung-Fa Chou
Author_Institution
EE Dept., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear
2013
fDate
22-24 April 2013
Firstpage
1
Lastpage
4
Abstract
IR-drop monitoring has been an effective means to assess the power integrity in real silicon. Existing methods, however, fail to achieve a high accuracy and a high sampling rate simultaneously. In this paper, we present a novel method to resolve this dilemma. First of all, we focus on the measurement of the worst-case IR-drop, instead of the entire sampled VDD waveform. This strategy can make a high sampling rate easily viable. Secondly, we perform periodic calibration to account for not only the process variation but also the temperature change. Post-layout simulation indicates that this method can support 1 GHz sample rate while keeping the measurement error less than 4.81 mV at the same time.
Keywords
CMOS integrated circuits; calibration; failure analysis; integrated circuit measurement; integrated circuit reliability; CMOS standard cells; IC failure; frequency 1 GHz; measurement error; on-chip monitoring; periodic calibration; post-layout simulation; power integrity; sampled VDD waveform; worst-case IR-drop monitoring; Calibration; Clocks; Dictionaries; Monitoring; Oscillators; Temperature measurement; Temperature sensors; IR-drop; Maximum Clock Period Measurement; On-Chip Monitoring; Process Calibration; Sampling Rate;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, Automation, and Test (VLSI-DAT), 2013 International Symposium on
Conference_Location
Hsinchu
Print_ISBN
978-1-4673-4435-7
Type
conf
DOI
10.1109/VLDI-DAT.2013.6533865
Filename
6533865
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