Title :
Intelligent Network-on-Chip With Online Reinforcement Learning for Portable HD Object Recognition Processor
Author :
Junyoung Park ; Injoon Hong ; Gyeonghoon Kim ; Byeong-Gyu Nam ; Hoi-Jun Yoo
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
Abstract :
An intelligent Reinforcement Learning (RL) Network-on-Chip (NoC) is proposed as a communication architecture of a heterogeneous many-core processor for portable HD object recognition. The proposed RL NoC automatically learns bandwidth adjustment and resource allocation in the heterogeneous many-core processor without explicit modeling. By regulating the bandwidth and reallocating cores, the throughput performances of feature detection and description are increased by 20.4% and 11.5%, respectively. As a result, the overall execution time of the object recognition is reduced by 38%. The proposed processor with RL NoC is implemented in a 65 nm CMOS process, and it successfully demonstrates the real-time object recognition for a 720 p HD video stream while consuming 235 mW peak power at 200 MHz, 1.2 V.
Keywords :
CMOS integrated circuits; bandwidth allocation; feature extraction; learning (artificial intelligence); multiprocessing systems; network-on-chip; object recognition; resource allocation; CMOS process; HD video stream; RL NoC; bandwidth adjustment; feature detection; frequency 200 MHz; heterogeneous manycore processor; intelligent reinforcement learning network-on-chip; portable HD object recognition; power 235 mW; resource allocation; size 65 nm; voltage 1.2 V; Bandwidth; Feature extraction; High definition video; Learning (artificial intelligence); Object recognition; Streaming media; Application specific integrated circuits; network-on-chip; object recognition; reinforcement learning;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2013.2284188