Title :
A comparative study of gate first and last Si MOSFETs fabrication processes using ALD beryllium oxide as an interface passivation layer
Author :
Yum, J.H. ; Shin, H.S. ; Mushinski, R.M. ; Hudnall, T.W. ; Oh, J.H. ; Loh, W.Y. ; Bielawski, C.W. ; Bersuker, Gennadi ; Banerjee, Sanjay K. ; Wang, W.E. ; Kirsch, P.D. ; Jammy, R.
Author_Institution :
SEMATECH, Austin, TX, USA
Abstract :
Extending our previous study demonstrating that ALD-BeO hi-k on Si and III-V exhibits excellent electrical characteristics, we discuss the advantages of using BeO as the interface passivation layer (IPL) in silicon metal-oxide-semiconductor field effect transistors (Si-MOSFETs) from the perspective of the gate-first and the gate-last process. By comparing three hi-k stacks, BeO/HfO2, Al2O3/HfO2, and SiO2/HfO2, fabricated using the gate first and gate last processes, we demonstrate that for both processes, BeO/HfO2 significantly outperforms the other stacks in terms of drive current, transconductance (Gm), subthreshold swing (SS), inversion capacitance, and mobility.
Keywords :
III-V semiconductors; MOSFET; atomic layer deposition; beryllium compounds; carrier mobility; passivation; semiconductor device manufacture; silicon; ALD beryllium oxide; Al2O3-HfO2; BeO-HfO2; IPL; MOSFET fabrication processes; Si; drive current; electrical characteristics; gate-first process; gate-last process; interface passivation layer; inversion capacitance; mobility; silicon metal-oxide-semiconductor field effect transistors; silicon-MOSFET; subthreshold swing; transconductance; Aluminum oxide; Annealing; Hafnium compounds; Logic gates; MOSFET; Silicon; Thermal stability;
Conference_Titel :
VLSI Technology, Systems, and Applications (VLSI-TSA), 2013 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4673-3081-7
Electronic_ISBN :
978-1-4673-6422-5
DOI :
10.1109/VLSI-TSA.2013.6545611