Leveraging puma DF wafer inspection to characterize root cause of yield loss on an advanced 32 nm HKMG SOI technology device

This paper presents a systematic methodology to enable Puma double dark field wafer inspection tool to detect key yield related defect that causes micro-masking defects in the Gate module/sector of an advanced 32nm High-K Metal Gate (HKMG) SOI technology device. Two approaches were adapted to detect the source of the micro-masking defect, namely (i) Patterned wafer inspection in High K metal Gate module to understand the initial findings (ii) Collaborative work with other advanced fabs (Partners) that led to a systematic partitioning approach through the Front End of the Line (FEOL) sectors to exactly pinpoint the root cause of the yield loss in Gate sector. Based on the above systematic partitioning approach, the source of the embedded defect that causes yield loss in gate sector was successfully identified. This methodology has also enabled a process fix to be put in place for reducing the addition of embedded defects in the FEOL sector and has directly helped in improving the yield in FEOL sector. This paper also discusses the advantage of collaborating with different wafer manufacturing companies (IBM partners) in being able to successfully identify root cause of key yield limiting issues.